Electronic control apparatus

ABSTRACT

The objective is to provide an electronic control apparatus capable of overwriting data in a nonvolatile memory, even during control operation. An ECU ( 10 ) includes a CPU ( 100 ), a flash EEPROM 101, and a calibration RAM ( 102 ). When calibration is performed, data in a calibration area of the flash EEPROM ( 101 ) is stored into the calibration RAM ( 102 ). A memory area of the calibration RAM ( 102 ) is overlapped over the calibration area to perform calibration. The data in the calibration area is written into the calibration RAM ( 102 ). When the calibration is completed, a super-user mode is entered in which the data stored in the calibration RAM ( 102 ) is written into the flash EEPROM ( 101 ) by use of a control register ( 113 ).

BACKGROUND OF THE INVENTION

The present invention relates to electronic control apparatus forcontrolling a device, and more specifically to an electronic controlapparatus capable of overwriting control data.

Control data, such as control programs and control parameters forcontrolling a device and so forth, is stored in a nonvolatile memory(ROM) so that it is not erased even when a battery is disconnected, andsometimes is supplied to the user. For example, an electronic controlapparatus is used for control of engines, transmissions, and otherautomobile parts, and the resulting control data is stored in a ROMwithin the electronic control apparatus.

After the electronic control apparatus is installed in an automobile, anautomobile manufacturer or dealer may desire to calibrate the controldata in accordance with the characteristics of a device under control,such as the actual engine or transmission. Thus, the control data isoften stored in a rewritable nonvolatile memory, such as an EEPROM(Electronically Erasable and Programmable ROM) or flash memory (flashEEPROM) such that the control data can be overwritten. A flash EEPROM ischaracterized by its relatively simple internal circuitry and low cost.

The storage area of the flash EEPROM is divided into a plurality ofstorage blocks, so that data is erased and/or written for each blockduring an overwrite. For example, with a 64 KB flash EEPROM having twostorage blocks each with a storage capacity of 32 kilobytes (KB), a dataoverwrite process is performed every 32 kB. However, with the flashEEPROM, while a data overwrite process is performed, the data in thatstorage block cannot be read out.

Furthermore, with the flash EEPROM, the time required for a dataoverwrite process is very long, as compared to the time required for anoverwrite in a RAM (Random Access Memory). Thus, if calibration is to beperformed according to the characteristics of a device under control,such as an engine, data to be written into the flash EEPROM is typicallystored temporarily in an external storage device, such as a debugger.Then, after the engine is stopped, the data stored in the externalstorage device is used to perform an overwrite process for the flashEEPROM. Thus, if multiple calibrations are to be performed for a singleflash EEPROM, the above process needs to be repeated for eachcalibration, which is very time-consuming.

The present invention is designed in consideration of the above problem,and has as its objective to provide an electronic control apparatuscapable of performing a data overwrite process for a nonvolatile memory,even during a control operation.

SUMMARY OF THE INVENTION

To solve the aforedescribed problem, the invention according to claim 1provides an electronic control apparatus having a nonvolatile memory anda volatile memory that store control data for controlling a device. Theelectronic control apparatus comprises a controller that uses datastored in the volatile memory to perform calibration of the controldata, and execute a write of the data stored in the volatile memory intothe nonvolatile memory when the calibration is completed.

The invention according to claim 2 provides an electronic controlapparatus according to claim 1, wherein the controller stores the datain the nonvolatile memory to be calibrated into the volatile memory,when the calibration is started; and uses the data stored in thevolatile memory to execute calibration of the control data.

The invention according to claim 3 provides an electronic controlapparatus according to claim 1 or 2, wherein the controller furtheridentifies an address of the nonvolatile memory to be calibrated, whenthe calibration is started, assigns the same address as that of thenonvolatile memory to the volatile memory, and preferentially executesdata processing for the volatile memory during the calibration.

The invention according to claim 4 provides an electronic controlapparatus according to any one of claims 1 through 3, further comprisinga control register for controlling data in the nonvolatile memory,wherein the controller writes the address of the nonvolatile memory andcalibrated control data into the control register when the calibrationis completed and uses the address and calibrated control data written inthe control register to execute a write into the nonvolatile memory.

The invention according to claim 5 provides an electronic controlapparatus according to claim 4, further comprising an authority registerfor controlling the authority to permit use of the control register,wherein the control means sets the authority register when a write intothe volatile memory is executed and clears the authority register afterthe write operation is completed.

The invention according to claim 6 provides an electronic controlapparatus according to any one of claims 1 through 5, wherein the devicehas a plurality of units; the control data is stored in the nonvolatilememory corresponding to each of the units; the volatile memory has astorage capacity capable of storing control data corresponding to theunit to be calibrated.

The invention according to claim 7 provides an electronic controlapparatus according to any one of claims 1 through 6, wherein thenonvolatile memory has at least two or more storage blocks; the write isexecuted for each storage block; when a write into the storage block isexecuted, another storage block is used to control the device.

According to the invention described in claim 1, data stored in thevolatile memory is used to execute calibration of control data. When thecalibration is completed, a write of the data stored in the volatilememory into the nonvolatile memory is executed. Thus, the volatilememory installed in the electronic control apparatus can be used tocalibrate the nonvolatile memory that stores control data forcontrolling the device. In that case, calibration can be performedwithout the necessity of using an external storage device, such as adebugger. By performing such a write process, calibration can beachieved while the device under control is being operated.

According to the invention described in claim 2, when calibration isstarted, the data in the nonvolatile memory to be calibrated is storedinto the volatile memory, and the data stored in the volatile memory isused to execute calibration of the control data. Thus, calibration canbe achieved using pre-adjusted control data as a starting point. Bystoring standard control data in the nonvolatile memory, fine adjustmentmay only be performed depending on the characteristics of the deviceunder control, so that efficient calibration can be accomplished.

According to the invention described in claim 3, when calibration isstarted, the address of the nonvolatile memory to be calibrated isidentified. Then, the same address as that of the nonvolatile memory isassigned to the volatile memory, and data processing for the volatilememory is preferentially executed during calibration. That is, on thememory map, the memory area of the volatile memory is set as overlappedover the memory area to be calibrated. Thus, the electronic controlapparatus can control the device by use of an address as usual, evenduring calibration.

According to the invention described in claim 4, when calibration iscompleted, the address of the volatile memory and calibrated controldata are written into the control register. Then, the address andcalibrated control data stored in the control register are used toexecute a write into the nonvolatile memory. The data in the volatilememory can be reliably written into the nonvolatile memory via thecontrol register.

According to the invention described in claim 5, the electronic controlapparatus has an authority register for controlling the authority topermit use of the control register. When a write into the volatilememory is executed, the authority register is set; after the write iscompleted, the authority register is cleared. Thus, memory managementfor the control register may be performed only when a write is executed.

According to the invention described in claim 6, the volatile memory hasa storage capacity capable of storing the control data corresponding tothe unit to be calibrated. Thus, the storage capacity of the volatilememory can be restricted to that required for calibration, so that areduction in size and cost of the electronic control apparatus can beachieved.

According to the invention described in claim 7, the nonvolatile memorycomprises at least two or more storage blocks, and a write is executedfor each storage block. When a write into the storage block is executed,another storage block is used to control the device. Thus, overwritingof control data in the nonvolatile memory can be achieved, while thedevice is being controlled. Accordingly, calibration can be achievedefficiently, without needing to reboot the device under control or theelectronic control apparatus.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram depicting the overall configuration of anECU (electronic control apparatus) according to an embodiment of thepresent invention.

FIG. 2 is a flow chart for explaining the overwrite process for a flashEEPROM.

FIG. 3 is another flow chart for explaining the overwrite process for aflash EEPROM.

FIG. 4 is an explanatory diagram for a memory map.

FIG. 5 is another explanatory diagram for a memory map.

FIG. 6 is a further explanatory diagram for a memory map.

FIG. 7 is yet another explanatory diagram for a memory map.

DETAILED DESCRIPTION OF THE INVENTION

One embodiment of the present invention is described in detail belowwith reference to FIGS. 1 through 7. In the present embodiment, it isassumed, as shown in FIG. 1, that an object under control 11, such as anautomobile engine, is controlled by use of an electronic control unit(ECU) 10. That is, after the ECU 10 is installed in the automobile,calibration of control parameters as control data is performed in orderto control each of the units that comprise the automobile.

The ECU 10 includes a CPU 100, a flash EEPROM 101 as a nonvolatilememory, and a calibration RAM 102 as a volatile memory. The ECU 10 alsoincludes a clock module, A/D converter, and so forth that are not shown.The CPU 10 is configured to execute various programs stored in the flashEEPROM 101, calibration RAM 102, and so forth.

The flash EEPROM 101 contains data regarding control commands andcontrol parameters used by the ECU for control. The flash EEPROM 101used in the present embodiment has a storage capacity of 64 kilobytes(KB), as a whole. The storage area is made up of 32 kB storage blocks(“block 0” and “block 1” on the memory map). For an overwrite, a dataerasure and a write are performed on a block-by-block basis. The “block0” contains data regarding control commands, while the “block 1”contains data regarding control parameters for each unit under control.In the present embodiment, it is assumed that a control command in the“block 0” causes an overwrite of the control parameter in the “block 1”during control of the object under control 11.

The calibration RAM 102 is a memory for temporarily storingpredetermined data during calibration. For the calibration RAM 102, amemory having a storage capacity capable of storing control parameterscorresponding to each unit under control should be used. The calibrationRAM 102 in the present embodiment has a storage capacity of 2 kB.

The ECU 10 further includes an input/output interface section 120. Eachportion of the ECU 10 is connected via the input/output interfacesection 120 to a user interface section 12 and an object under control11. The user interface section 12 is used by the user to specify theobject under control 11 and confirm the parameter.

The object under control 11 is a device, such as an engine,transmission, and other device to be controlled. The ECU 10 receivesdata from various sensors installed in the object under control 11, andoutputs data to the actuator and so forth, via the input/outputinterface section 120.

The CPU 100 is connected to an address decoder 110 via an address bus.The address decoder 110 outputs, in accordance with an address signalfrom the CPU 100, a signal to its corresponding output terminal. In thepresent embodiment, the CPU 100 and address decoder 110 function ascontrol means.

The address decoder 110 includes an initialization register 111. Theinitialization register 111 comprises an area for storing data regardingan address of an area where calibration is performed, and an area(activation bit) for storing data regarding the activation of thecalibration RAM 102. In the present embodiment, when the calibration RAM102 is activated, “1” is input to the activation bit.

Furthermore, the ECU 10 includes a super-user mode register 112 as anauthority register, for controlling the mode (hereinafter referred to as“super-user mode) to grant authority regarding an overwrite for theflash EEPROM 101. When the super-user mode is set, “1” is input to theauthority bit contained in the super-user mode register 112.

The ECU 10 further includes a flash control register 113 as a controlregister for controlling data in the nonvolatile memory. The flashcontrol register 113 is used in the super-user mode. The flash controlregister 113 retains addresses to be written into the flash EEPROM 101,and calibrated control parameters.

Additionally, the CPU 100, calibration RAM 102, flash control register113, and input/output interface section 120 are connected to the databus, respectively, so that data is sent and received over the data bus.

Next, of the processes performed by the ECU 10, a process for rewritingdata stored in the flash EEPROM 101 to data suitable for the objectunder control 11 is described with reference to FIGS. 2 through 7.

While the ECU 10 is controlling the object under control 11 inaccordance with the data stored in the flash EEPROM 101, the user usesthe user interface section 12 to issue an instruction for calibrationregarding the object under control 11. This instruction is transferredto the CPU 100 via the input/output interface section 120 and data bus.

Then, the ECU 10 enters the calibration mode, where the processdescribed in FIG. 2 is started. First, the CPU 100 determines acalibration area on the flash EEPROM 101 (S1-1). In that case, the CPU100 inputs “1” to the activation bit of the initialization register 111to activate the calibration RAM 102. Further, an address of an areawhere calibration is performed is stored in the initialization register111.

Next, the data in the calibration area of the flash EEPROM is copied tothe calibration RAM 102 (S1-2). This operation is described withreference to a memory map 500 shown in FIG. 4. In the memory map 500 areset a memory area 501 corresponding to the calibration RAM 102; a memoryarea 502 corresponding to the “block 0” of the flash EEPROM 101; and amemory area 503 corresponding to the “block 1” thereof. In the presentembodiment, locations 6000 through 67FF in the memory area 503 areassumed to be a calibration area 504. Then, at step (S1-2), the data inthe calibration area 504 is copied to the memory area 501 correspondingto the calibration RAM 102.

Next, the calibration RAM 102 is overlapped over the calibration area(S1-3). This operation is explained with reference to the memory map 510shown in FIG. 5. Here, the memory area 501 of the calibration RAM 102that is set on the memory map 510 is matched to the address that is setfor the calibration area 504. That means the same address is assigned tothe memory area 501 and calibration area 504.

Next, calibration processing is executed according to thecharacteristics of the object under control 11 (S1-4). This process isexplained with reference to the flow diagram shown in FIG. 3. The useruses the user interface section 12 to issue a modification instructionfor parameter data and so forth that controls the object under control11 (S2-1). In that case, the CPU 100 performs various processes, such asreading or overwriting of data on the memory map 510.

For processing of the memory area overlapped with the calibration RAM102 (in case of “YES” to step (S2-2)), processing is performed inaccordance with the data in the calibration RAM 102 (S2-3). That is, if“1” is set in the activation bit of the initialization register 111,each processing for the memory area where the same address (locations6000 through 67FF in the present embodiment) is assigned to the flashEEPROM 101 and calibration RAM 102 is performed for the memory area 501of the calibration RAM 102.

On the other hand, for processing of the area that is not overlappedwith the calibration RAM 102 (in case of “NO”), processing is performed,as usual, on the data in the flash EEPROM 101 on the memory map 510(S2-4).

Then if there is any new instruction for data processing (in case of“NO” to step (S2-5)), steps (S2-1) through (S2-4) are repeated toperform calibration. On the other hand, if a suitable parameter value isfound for the object under control 11, the user uses the user interfacesection 12 to issue an instruction to end the calibration. If aninstruction to end the calibration is issued (in case of “YES” to step(S2-5)), the routine returns to the flow shown in FIG. 2.

Next, the super-user mode is set (S1-5). Specifically, “1” is input tothe authority bit of the super-user mode register 112. In that case, awrite of the control parameter stored in the calibration RAM 102 intothe flash EEPROM 101 is executed (S1-6). That is, as on the memory map520 shown in FIG. 6, the data in the memory area 501 of the calibrationRAM 102 that is set on the memory map 520 is written into thecalibration area 504. Specifically, in the super-user mode, the flashcontrol register 113 becomes accessible on the memory map. Then, theaddress and data stored in the calibration RAM 102 are written into theflash control register 113. Furthermore, in accordance with the addressstored in the flash control register 113, the data stored in the flashcontrol register 113 is written into the address on the flash EEPROM101. Meanwhile, the ECU 10 continues to control the object under control11 in accordance with the data stored in the memory area 502.

When the program is completed, the authority bit of the super-user moderegister 112 is cleared, and the super-user mode is exited back to thenormal mode. Furthermore, the setting of the initialization register 111is changed (S1-7). Here, the activation bit of the initializationregister 111 is cleared. This results in a memory map 530 shown in FIG.7. That is, the memory area 501 of the calibration RAM 102 is removed,and the calibrated area 531 where the data of the calibration RAM 102has been written is generated on the memory map 530. The ECU 10 thenuses the overwritten data in the flash EEPROM 101 to control the objectunder control 11. Then, the overwrite of the flash EEPROM ends.

According to the aforedescribed embodiment, the following features canbe attained. In the aforedescribed embodiment, the ECU 10 includes theflash control register 113, and enters the super-user mode when thecalibration is completed. In this mode, the flash control register 113becomes accessible on the memory map. Then, the data stored in thecalibration RAM 102 is programmed into the flash EEPROM 101 by use ofthe flash control register 113. Thus, even when the ECU 10 is beingoperated, data in a certain area of the flash EEPROM 101 may be erasedor overwritten. Conventionally, the object under control 11 must bestopped and control of the ECU 10 interrupted before overwriting theflash EEPROM 101. Thus, when another calibration is performed, it isnecessary to reboot the ECU 10 and object under control 11. In thatcase, it would take time before the object under control 11 and so forthbecomes stable after boot-up. By performing calibration while the objectunder control 11 is still operated as described in the presentembodiment, the calibration task can be completed more quickly.

In the aforedescribed embodiment, the super-user mode can be used toperform calibration during operation of the ECU 10. Thus, calibrationcan be achieved efficiently, even when the calibration RAM 102 isrelatively small, such as 2 kB. By using such a small-capacitycalibration RAM 102, the ECU 10 can be reduced in size. Furthermore,because the RAM is rather expensive, use of a small calibration RAM 102allows for a reduction in cost of the ECU 10.

In the aforedescribed embodiment, the calibration RAM 102 installed inthe ECU 10 is used to overwrite data in the flash EEPROM 101. That is,the ECU 10 itself has a mechanism for overwriting data in the flashEEPROM 101. This eliminates the need for storing the calibrated datainto an external storage device, such as a debugger. Thus, overwritingof data stored in the flash EEPROM 101 can be done efficiently.

In the aforedescribed embodiment, an address of the area wherecalibration is performed is stored in the initialization register 111,when the calibration is started. This address may be used to copy thedata in the flash EEPROM 101 to the calibration RAM 102, and to set thememory area 501 of the calibration RAM 102 in the calibration area 504of the flash EEPROM 101. That means the setting area for the calibrationRAM 102 can be set according to the calibration area.

It should be appreciated that the aforedescribed embodiment may bemodified as follows. In the aforedescribed embodiment, when the programis completed, the authority bit of the super-user mode register 112 iscleared, and the super-user mode is exited back to the normal mode.Meanwhile, the activation bit of the initialization register 111 iscleared. Instead, if calibration of another object under control 11 isperformed continuously, an address of an area where a new calibration isperformed may be set in the initialization register 111, whilemaintaining “1” for the activation bit of the initialization register111. This enables calibrations to be performed continuously.

In the aforedescribed embodiment, a calibration RAM 102 having a storagecapacity of 2 kB is used, although it is not limited thereto. It mayhave a capacity to cover a memory area required for a singlecalibration. Furthermore, a calibration RAM 102 having a larger storagecapacity may be used to perform calibration for more objects undercontrol 11 at a time.

In the aforedescribed embodiment, a control command for the “block 0” ofthe flash EEPROM 101 is used to overwrite the control parameter for the“block 1” during control operation of the object under control 11,although it is not limited thereto. It may be embodied in an electroniccontrol apparatus that includes a flash EEPROM 101 that requiresoverwrites.

In the aforedescribed embodiment, the data in the calibration area ofthe flash EEPROM 101 is copied to the calibration RAM 102 at step(S1-2). Alternatively, this step may be skipped if there is no controldata in the calibration area.

In the aforedescribed embodiment, the object under control 11, such asan automobile engine, is controlled by use of the electronic controlapparatus (ECU 10), although it is not limited thereto. The point is, itmay include a flash EEPROM 101 and may be embodied in an electroniccontrol apparatus that implements overwrites of its data.

As described in detail above, according to the present invention,overwriting of data for the nonvolatile memory can be achieved evenduring control operation.

1. An electronic control apparatus having a nonvolatile memory and avolatile memory that store control data for controlling a device, theelectronic control apparatus comprising: a controller that uses datastored in the volatile memory to perform calibration of the control dataand performs a write of the data stored in the volatile memory into thenonvolatile memory, when the calibration is completed.
 2. The electroniccontrol apparatus of claim 1, wherein the controller stores the data inthe nonvolatile memory to be calibrated into the volatile memory, whenthe calibration is started and uses the data stored in the volatilememory to perform calibration of the control data.
 3. The electroniccontrol apparatus according to claim 1, wherein the controller further:identifies an address of the nonvolatile memory to be calibrated whenthe calibration is started; assigns the same address as that of thenonvolatile memory to the volatile memory; and preferentially executesdata processing for the volatile memory during the calibration.
 4. Theelectronic control apparatus according to any one of claims 1 through 3,further comprising: a control register for controlling data in thenonvolatile memory; and wherein the controller writes the address of thenonvolatile memory and calibrated control data into the control registerwhen said calibration is completed; and uses the address and calibratedcontrol data written in the control register to execute a write into thenonvolatile memory.
 5. The electronic control apparatus according toclaim 4, further comprising: an authority register for controlling theauthority to permit use of the control register; and wherein thecontroller: sets the authority register when a write into the volatilememory is executed; and clears the authority register after the write iscompleted.
 6. The electronic control apparatus according to any one ofclaims 1 through 5, wherein: the device includes a plurality of units;the control data is stored in the nonvolatile memory corresponding toeach of the units; and the volatile memory has a storage capacitycapable of storing control data corresponding to the unit to becalibrated.
 7. The electronic control apparatus according to any one ofclaims 1 through 6, wherein: the nonvolatile memory includes at leasttwo or more storage blocks; the write is executed for each storageblock; and when a write into one of the storage blocks is executed,another storage block is used to control the device.